IC Senior / Staff Physical Design Engineer (IC Backend)

The client is a chip design service company invested by an international consortium and founded by a senior chip design technical team. The company is headquartered in Singapore and will take root in Singapore for long-term development. The company has strong R&D capabilities, and its core technical team members all have more than 10 years of experience in chip design. They have rich industry experience and deep practical accumulation in ASIC design and business management.

Work Location: One-North area, Singapore

Job Description：

Works with the front-end design team to complete the chip floorplan , clock architecture, and powerplan .
Takes charge of the physical design tasks from the Netlist to the GDS2, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability (DFR) and tapeout.

Position Requirements:

Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.
At least 5 years of work experience in the digital backend design field. Hands-on project experience is required. Tapeout experience at advanced technology is preferred. (Excellent Junior Engineers will also be considered with less than 5 years work experience)
Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.
Strong communication ability, good confidence and self-motivation
Proficiency in Mandarin and English is preferred.

We invite you to write in to Kevin at k.chong@jondavidsongroup.com , with your updated CV (in MSWord format). We regret to inform only selected candidates will be notified. However, if you are not selected, we will keep your CV and contact you for suitable role(s) that comes along.

Kevin Chong
WA: +65-62957159
EA Reg No. R1109670
EA License No. 22S1412

Staff / Senior Physical Design Engineer (IC Backend)